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IRPLLED1
IRPLLED1 High Voltage LED Driver using the IRS2540
Table of Contents
Page 1. Introduction...............................................................................1 2. Constant Current Control.......................................................................3 3. Frequency Selection..............................................................................6 4. Output L1 and COUT Selection ................................................................6 5. FET vs. Diode for the Low-Side Switch.........................................12 6. VCC Supply .............................................................................15 7. VBS Supply .............................................................................16 8. Enable Pin ..............................................................................17 9. Other Design Considerations ......................................................23 10. Design Procedure Summary .....................................................24 11. Bill of Materials ..................................................................24-26 12. PCB Layout ...........................................................................26
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1. Introduction
As the industry becomes more power conscious to compensate for increasing energy costs and to meet governmental regulations, new innovative ways of conserving energy are being developed. For the lighting industry one of these outlets has been LEDs. Due to their longevity, robust design, low maintenance and high efficiency, they have proven to be a viable alternative to less efficient light sources. With their long term projected falling cost and further increased efficiency, the industry has eagerly embraced LEDs and put them in high demand. LEDs require drivers that have specific features such as constant current control over the temperature and manufacturing variations of LEDs, dimming, and appropriate fault protections. The IRS254(0,1) is specifically designed to address these requirements The IRPLLED1 evaluation board is a high voltage LED driver designed to operate on an input DC voltage of 40 V to 170 V and supply a programmable load current of 350 mA, 700 mA, 1 A, or 1.5 A. The output voltage is also clamped at 30 V by the external open-circuit-protection circuitry, which can easily be disabled or reconfigure as explained in this reference design. However the output voltage should not exceed the ratings of the external components mounted on the board; higher voltage when optimized components are utilized in the design. IRPLLED1 uses the IRS254(0,1), a high voltage, high frequency buck control IC for constant LED current regulation. The IRS254(0,1) controls the average load current by a continuous mode time-delayed hysteretic method using an accurate on chip band gap voltage reference. The 8-pin, 200 V (600 V) rated IRS2540 (IRS2541) inherently provides short-circuit protection, with open-circuit protection incorporated by a simple external circuit and has full dimming capabilities. The IRS254(0,1) allows scalable designs to accommodate series and parallel configurations of LEDs, for today's production LEDs as well as new generation higher current LEDs, and provides high current control accuracy over input and output voltage. The evaluation board documentation will briefly describe the functionality of IRS254(0,1), discuss the selection of the output stage, of the switching components, and of the surrounding circuitry. This board was tested with a single LumiledsTM flood board for the 350 mA and 700 mA settings, and two Lumileds flood boards in parallel for the 1 A and 1.5 A settings. Lumileds flood boards are available through Future Electronics and have a max nominal current rating of 700 mA with a breakdown voltage between 16 V and 24 V. This demo board can operate off of a 120 V AC rectified line with the addition of a proper rectifying circuit.
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2. Constant current control
The IRS254(0,1) is a time-delayed hysteretic buck controller. During normal operating conditions the output current is regulated via the IFB pin voltage, nominal value of 500 mV. This feedback is compared to an internal high precision band gap voltage reference. An on-board dV/dt filter has also been used to prevent erroneous transitioning. Once the supply to the chip reaches VCCUV+, the LO output is held high and the HO output is low for a predetermined period of time. This initiates the charging of the bootstrap capacitor, establishing the VBS floating supply for the high-side output. Then the chip begins toggling HO and LO outputs as needed to regulate the current. The deadtime of approximately 140 ns between the LO and HO gate drive signals prevents "shoot-through" and reduce switching losses, particularly at higher frequencies.
VBUS L2 VOUT + RS1 RS2 DBOOT
IC1 CVCC1 ROV1 CBUS2 CBUS1 DOV ROV2 CEN RF
ENN VCC VB
1
COM
8
HO
RG1 M1 CBOOT L1
DCLAMP
2
CVCC2
IFB
7
VS
3 4
6
LO
5
RG2
M2 COUT VOUT -
RCS ROUT CF COM EN DEN1
Fig. 1: IRS254(0,1) Constant Current LED Driver Typical Schematic (see Fig. 16 for evaluation board schematic) Note: Rout is needed only in few applications Under normal operating conditions, if VIFB is below VIFBTH, HO is on and the load is receiving current from VBUS. This simultaneously stores energy in the output stage, L1 and COUT, whilst VIFB begins to increase. Once VIFB crosses VIFBTH, HO switches off after the delay tHO,off. Once HO is off, LO will turn on after the deadtime, the inductor and output capacitor release the stored energy into the load and VIFB starts decreasing. When VIFB crosses VIFBTH again, LO switches off after the delay tLO,off and HO switches on after the delay tHO,on.
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(A) Fig. 2: (A) Storing Energy in Inductor (B) Releasing Stored Inductor Energy
(B)
Fig. 3: IRS254(0,1) Control Signals, Iavg=1.2 A
HO
50%
50%
50%
t_HO_off DT1
t_HO_on DT2
LO
t_LO_on
50%
50%
t_LO_off
IFB
IFBTH
Fig. 4: IRS254(0,1) Time Delayed Hysteresis
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The switching continues to regulate the current at an average value determined as follows: when the output combination of L1 and COUT is large enough to maintain a low ripple on IFB (approximately less than 100 mV), Iout(avg) can be calculated:
Iout (avg ) = VIFBTH
RCS
Having load current programmable from 350 mA to 1.5 A, series and parallel combinations of resistors must be used to properly set the current, as well as distribute power accordingly. Equivalent resistances for each current setting were calculated as follows:
R350 mA =
0.5 V = 1.43 350 mA 0.5 V R700 mA = = 0.71 700 mA 0.5 V R1 A = = 0.5 1A 0.5 V R1.5 A = = 0.33 1.5 A
Since some of these equivalent values of resistance are not available, series and parallel combinations are used, and they are specified as follows (all combinations use standard value resistors: 1.43 , 0.56 , and 0.47 ):
R350mA = 1.43 R700mA = 0.71 (1.43 || 1.43 ) = 0.715
R1A = 0.5 (0.47 + 0.56 ) || (0.47 + 0.56 ) = 0.515
R1.5 A = 0.33 (0.47 + 0.56 ) || (0.47 + 0.56 ) || (0.47 + 0.56 ) = 0.343
Although some of the series and parallel combinations do not yield the exact resistance needed, for all tolerance purposes, they are accurate enough. For this evaluation board, an extremely tight current regulation was achieved with a worst case result of 1.2% for the 350 mA setting as the bus voltage was swept from 40 V to 170 V. Likewise a precise regulation of 0.25% was maintained for a varying load voltage from 16 V to 24 V for the 350 mA current setting.
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1600 1400 1200 IOUT (mA) 1000 800 600 400 200 0 30 80 VIN (V) 130 180
350mA 1A 700mA 1.5A
0.3% 0.5% 0.6% 1.2%
Fig. 5: Vout = 16 V, L1 = 470 H, COUT = 33 F
1600 1400 1200
IOUT (mA)
0.1% 0.17% 0.13%
350mA 700mA 1A 1.5A
1000 800 600 400 200 0 10 15 20
VOUT (V)
0.25%
25
30
Fig. 6: Vbus = 100 V, L1 = 470 H, COUT = 33 F
3. Frequency selection
The frequency in the IRS254(0,1) is free running and maintains current regulation by quickly adapting to changes in input and output voltages. There is no need for additional external components to set the frequency as seen with most oscillators, resulting in a part reduction. The frequency is determined by L1 and COUT, as well as the input/output voltages and load current. The selection of the frequency will be a trade-off between system efficiency, current control regulation, size, and cost. The higher the frequency, the smaller and lower the cost of L1 and COUT, the higher the ripple, the higher the FET switching losses, which becomes the driving factor as VBUS increases to higher voltages, the higher the component stresses and the harder it is to control the output current. With an input voltage as high as 170 V, the targeted frequency was determined to be between 50 kHz and 75 kHz. Within this operating spectrum all components can easily handle their associated power losses. RD-0608 6
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4. Output L1 and COUT selection
To maintain tight hysteretic current regulation L1 and COUT need to be large enough to maintain the supply to the load during tHO,on and avoid significant undershooting of the load current, which in turn causes the average current to fall below the desired value. First, we are going to look at the effect of the inductor when there is no output capacitor to clearly demonstrate the impact of the inductor. In this case, the load current is identical to the inductor current. Figure 7 shows how the inductor value impacts the frequency over a range of input voltages. As can be seen, the input voltage has a great impact on the frequency and the inductor value has the greatest impact at reducing the frequency for smaller input voltages. Figure 8 shows how the variation in load current increases over a span of input voltage, as the inductance is decreased. Figure 9 shows the variation of frequency over different output voltages and different inductance values. Finally Fig. 10 shows how the load current variation increases with lower inductance over a range of output voltages.
375 Frequency (kHz)
325
275
470uH 680uH 1mH 1.5mH
225
175 30 80 VIN (V) 130 180
Fig. 7: Iout = 350 mA, Vout = 16.8 V, COUT = 0 F The output capacitor can be used simultaneously to achieve the target frequency and current control accuracy. Figure 11 shows how the capacitance reduces the frequency over a range of input voltage. A small capacitance of 4.7 F has a large effect on reducing the frequency. Figure 12 shows how the current regulation is also improved with the output capacitance. There is a point at which continuing to add capacitance no longer has a significant effect on the operating frequency or current regulation, as can be seen in Figs. 12 & 13.
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400
470uH
390 380 IOUT (mA) 370 360 350 340 330 30
680uH 1mH 1.5mH
80
VIN (V)
130
180
Fig. 8: Iout = 350 mA, Vout = 16.8 V, COUT = 0 F
400 380 360 Frequency (kHz) 340 320 300 280 260 240 220 200 13 18 23 VOUT (V) 28 33
470uH 680uH 1mH 1.5mH
Fig. 9: Iout = 350 mA, Vin = 50 V, COUT = 0 F
345 343 341 339 IOUT (mA) 337 335 333 331 329 327 325 13 18 23 VOUT (V) 28 33
470uH 680uH 1mH 1.5mH
Fig. 10: Iout = 350 mA, Vin = 50 V, COUT = 0 F RD-0608 8
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1000
Frequency (kHz)
100
0uF 10uF 33uF
4.7uF 22uF 47uF
10 30 80 VIN (V) 130 180
Fig. 11: Iout = 350 mA, Vout = 16.8 V, L = 470 H
390
0uF
380 370 IOUT (mA) 360 350 340 330 30 50 70 90 110 130 150 170
4.7uF 10uF 22uF 33uF 47uF
VIN (V)
Fig. 12: Iout = 350 mA, Vout = 16.8 V, L = 470 H
400 350 300 Frequency (kHz) 250 200 150 100 50 0 0 10 20 30 Capacitance (F) 40 50
40V 100V 160V
Fig. 13: Iout = 350 mA, Vout = 16.8 V, L = 470 H www.irf.com RD-0608 9
The addition of the COUT is essentially increasing the amount of energy that can be stored in the output stage, which also means it can supply current for an increased period of time. Therefore by slowing down the di/dt transients in the load, the frequency is effectively decreased. With the COUT capacitor, the inductor current is no longer identical to that seen in the load. The inductor current will still have a perfectly triangular shape, where as the load will see the same basic trend in the current, but all sharp corners will be rounded with all peaks significantly reduced, as can be seen in Figs. 14 & 13.
Fig. 14: Iout = 350 mA, Vin = 100 V, Vout = 16.85 V, L = 470 H, COUT = 33 F
Fig. 15: Iout = 350 mA, Vin = 100 V, Vout = 16.85 V, L = 470 H, COUT = 33 F RD-0608 10
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L1 and COUT need to be chosen so that it stores enough energy to supply the load during tHO,on while maintaining current control accuracy. A lower value of L1 will require a larger value of COUT. Since this evaluation board is designed to handle a load current only as high as 1.5 A, off the shelf inductors are available. Instead, to minimize or eliminate any effects of eddy currents, a custom inductor for this application was designed by VOGT. High value (in the order of 1 mH or more) inductors that can handle this amount of current are not readily available and tend to be bulky and costly. With too small of an inductor (in the order of 100 H or less), the COUT capacitor would need to be in the order of hundreds of micro farads to maintain good current regulation. Additionally, with a smaller inductance, the ripple current seen by the capacitor would be quite large, shortening the life of the capacitor, if an electrolytic were used. Because of these considerations an inductor of 470 H and an output capacitance of 33 F were chosen to accommodate the 1.5 A load current. The current ripple associated with 470 H is relatively small, so the board can be operated with or without output capacitance at the lower current ratings.
5. FET vs. diode for the low-side switch
The IRS254(0,1) has been designed so that it can drive a low-side FET and a high-side FET. If the use of two FETs for the half-bridge proves to be a cost issue, the low-side FET can be replaced by a freewheeling diode as shown in Fig. 16. Of course this may yield a lower cost system, but there are some efficiency tradeoffs to be considered, particularly for higher load currents. The system efficiency is directly influenced by several system parameters including operating frequency, load current, and input voltage. A major parameter to consider is the reverse recovery time of the diode in comparison to the body diode of the FET it replaces. The diode intrinsically has a much shorter reverse recovery time since the device is specifically designed for this, where as the body diode is a parasitic element that originates from basic processing technology and typically has inferior characteristics, in terms of forward drop, reverse recovery, and power handling capabilities.
Fig. 16: Alternate IRS254(0,1) Time-Delayed Hysteretic Controlled Evaluation Board Schematic Note: Rout is needed only in few applications
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The reverse recovery problem is incurred during the deadtime after the low-side FET has been on and conducting current. During this deadtime the low-side FET is off, but the body diode is freewheeling and providing current to the load. Since the body diode is conducting current, carriers are present and will eventually need to be recombined, leading to reverse recovery. When the high-side FET turns on, the VS node is almost instantly pulled from COM to VBUS and the low-side FET or the freewheeling diode conducts current from VS to ground due to the reverse recovery effect, potentially resulting in large power losses, overheating of the low-side switching component and component stress, as can be seen in Figs. 17 & 18. Since the power diode has a much shorter reverse recovery time, the diode will conduct current for a significantly shorter period and have lower power losses. At lower frequency and lower load current, the long recovery time associated with the FET body diode may not be an issue. For higher frequency higher current applications, a diode could provide lower power losses with respect to a FET. In the evaluation board, the reverse recovery current peaks using a low-side FET would be on the order of 8 A, which puts a lot of stress on the components, not to mention the increased operating temperature. By replacing the low-side FET with an appropriate freewheeling diode, the reverse recovery peaks can be reduced and limited to 4.5 A. The frequency was also selected to keep the diode reverse recovery associated power losses low. With the inclusion of a freewheeling diode instead of a low-side FET there is a need for RS3 and DVCC. Without an initial pulse to come from LO establishing a ground reference for CBOOT to charge, an alternate ground reference must be established. There are two paths that could potentially serve this role, one is through RS2 and the other is through the open-circuit components, ROV1 and ROV2. The most versatile path is through ROV1 and ROV2 since there are no constraints along this path tied to the chip's turn on threshold. By making these two resistors, that are already serving function to the circuit, a bit smaller, the capacitor now has a low resistive path for which to charge. RS3 allows this charging path to exist without any interference from the chip VCC, likewise DVCC also allows this path to remain isolated. As the bus voltage is increased, the path will allow CBOOT to fully charge and remain charged until the chip comes out of UVLO. At which time the self powering feature will take over after the first pulse from HO, and the ground reference will then be created by the freewheeling diode.
Fig. 17: Using a low-side FET, Vin = 100 V, Iout = 1.5 A, Vout = 17 V
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Fig. 18: Using a diode on the low-side, Vin = 100 V, Iout = 1.5 A, Vout = 17 V
Fig. 19: Low-side FET vs. low-side diode comparison, Vin = 100 V, Iout = 1.5 A, Vout = 17 V The bus voltage is also of importance since it will determine how long the low-side FET, or the freewheeling diode will be conducting. If the bus voltage is very large in comparison to the output, the low-side FET or diode will be conducting for the majority of the switching period. A FET has much lower on-state losses due to the low RDS,on, where as high voltage diodes rarely have forward drops less than 1 V. If the load current is in the order of 1 A or 1.5A, a FET may have low on-state losses, where as the diode may experience larger conduction losses. If the load current is only a few hundred milliamps, the losses observed in the diode may not be a concern, and the cost savings of a diode could be exercised. For system efficiency, the forward conduction losses of a diode can also be compared to the reverse recovery losses with a low-side FET. For this evaluation board, it was found that conduction losses were less than reverse recovery losses when running at 1.5 A and therefore uses and freewheeling diode.
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Fig. 20: Low-side FET and low-side diode comparison, Vin = 100 V, Iout = 1.5 A, Vout = 17 V The most efficient solution would be to put the FET in parallel with the diode in the low-side position. In this case, during the deadtime, instead of the body diode freewheeling, the additional diode would be conducting. This will always be the case as long as the forward drop of the external diode is less than that of the body diode. If costs permit, a diode in parallel with an IGBT could also be an option. A detailed, evaluation of system needs and cost should be performed prior to choosing a FET or diode for the low-side. Although a diode is cheaper, in certain cases the associated power losses may require a heatsink, nullifying the cost reduction of using a diode. Likewise there are conditions where a FET may prove less efficient, in which case more money will be spent on the FET as well as the heatsink to keep it cool. The evaluation board is provided with a freewheeling diode and the footprint for a lowside FET has been provided to replace the diode with a FET if the application requires it. It is not recommended to replace the diode with a FET for the 1 A and 1.5 A operation because of the associated reverse recovery power losses. If replacing the diode with a FET is a requirement, it might be beneficial to move the diode heatsink to the high-side FET. In terms of choosing the correct FET, it is best to use a FET rated as low as possible considering what is needed in the application. FET parameters degrade as the voltage ratings go up. Therefore, if a 600 V FET is used in a 200 V application, extra losses may be incurred due to a component that far exceeds the requirements. If using two FETs, the next parameter to be considered is the reverse recovery time. Obviously FETs will not have a reverse recovery time comparable to diodes, but a good FET reverse recovery time will be in the order of 150 ns to 200 ns. The two remaining parameters to consider are direct trade-offs of each other, on resistance and gate charge. If the FET has a rather low gate capacitance, the die size will be small, but this will result in a larger on resistance which could potentially be a problem for high current applications. On the other hand, if the FET has a large gate capacitance, the die will be large and the FET will have a low on resistance, but it will be more difficult to turn on the FET which will also stress the IC. There has to be a direct compromise between the two, typically the best solution is a FET with a relatively low RDS,on and a medium sized gate capacitance, much like the device chosen for this application
6. VCC supply
Since the IRS2540 (IRS2541) is rated for 200 V (600 V), VBUS can reach values of this magnitude. If only a supply resistor to VBUS is used, it will experience high power losses. For higher voltage www.irf.com RD-0608 14
applications an alternate VCC supply scheme utilizing a resistor feed-back (RS2) from the output needs to be implemented, as seen in Figs. 1 & 16. The resistance between VBUS and VCC (RS1) should be large enough to minimize the current sourced directly from the input voltage line; value should be on the order of several kilo ohms. Through this supply resistor a current will flow to charge the VCC capacitor. Once the capacitor is charged up to the VCCUV+ threshold, the IRS254(0,1) begins to operate, activating the LO and HO outputs. After the first few cycles of switching, the resistor RS2 connected between the output and VCC will take over and source current for the IC. The RS2 resistor provided in the evaluation board has been designed for an output of roughly 20 V. If a higher output voltage is desired, RS2 will need to be redesigned and adjusted accordingly. A 10 F capacitor has been used for stabilizing VCC of the chip. Such a large capacitance makes the chip immune to any large low frequency ripple that may be observed on VBUS due to a rectified waveform. There are also other benefits associated with using such a large capacitance, of which will be discussed later. With having all input and output voltages defined for the evaluation board, enough information is provided to calculate values for RS1, RS2, and RS3 (see Fig. 23 for component definition). All three supply resistors were chosen to be 1 W devices since they source all current to the chip. By making each component 1 W, the work in supplying the chip can be split up equally, making it a more robust solution, instead of baring the entire task on one component. Doing this also allows the chip to turn on at a lower bus voltage. Assuming that a 14 V external zener diode will be used on VCC, exact values of RS1, RS2, and RS3 were calculated as follows (values were calculated to operate the components just below half their rated power):
2
P =V
R
RS1
1 W= 2
(V
Bus max
- 14 V
)
2
RS1
RS1
(V =
Bus max
- 14 V
1W 2
) = (170 V - 14 V )
2
2
1W 2
RS1 = 48.6 k 56 k
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RS3
min duty ratio 10%
1 W= 2
(1 - 0.1) (VBus
max
- 14 V
)
2
RS 3
RS 3 =
(1 - 0.1) (VBus
max
- 14 V
1W 2
) (1 - 0.1) (170 V - 14 V ) =
2
2
1W 2
RS 1 = 43.8 k 47 k
RS2
1 W= 2
(V
Out max
- 14 V
)
2
RS 2
RS 2 =
(V
Out max
- 14 V
1W 2
) (30 V - 14 V ) =
2
2
1W 2
RS 1 = 512 1 k
7. VBS supply
The bootstrap diode (DBOOT) and supply capacitor (CBOOT) comprise the supply voltage for the highside driver circuitry. To guarantee that the high-side supply is charged up before operation commences, the first pulse from the output drivers comes from the LO pin. During undervoltage lock-out mode, the high- and low-side outputs are both held low. During an open-circuit condition, without the watchdog timer, the HO output would remain high at all times and the charge stored in CBOOT would slowly leak until reaching zero, thus eliminating the floating power supply for the high-side driver. To maintain sufficient charge on CBOOT, a watchdog timer has been implemented. In the condition where VIFB remains below VIFBTH, the HO output will be forced low roughly after 20 s and the LO output forced high. This toggling of the outputs will last for 1 s to maintain and replenish sufficient charge on CBOOT.
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Fig. 21: Illustration of Watchdog Timer The bootstrap capacitor value needs to be chosen so that it maintains sufficient charge for at least the 20 s interval until the watchdog timer allows the capacitor to recharge. If the capacitor value is too small, the charge will fully dissipate in less than 20 s. The bootstrap capacitor should be at least 100 nF. A larger value within reason can be used if preferred. The bootstrap diode should be a fast recovery, if not an ultrafast recovery component to maintain good efficiency. Since the cathode of the bootstrap diode will be switching between COM and VBUS + 14 V, the reverse recovery time of this diode is of critical importance. For additional information concerning the bootstrap components, refer to the Design Tip (DT 98-2), "Bootstrap Component Selection For Control ICs" at www.irf.com under Design Support.
8. Enable pin
The enable pin can be used for dimming and open-circuit protection. When the ENN pin is held low, the chip remains in a fully functional state with no alterations to the operating environment. To disable the control feedback and regulation, a voltage greater than VENTH (approximately 2.5 V) needs to be applied to the ENN pin. With the chip in a disabled state, HO output will remain low, where as the LO output will remain high to prevent VS from floating, in addition to maintaining charge on the bootstrap capacitor. The threshold for disabling the IRS254(0,1) has been set to 2.5 V to enhance immunity to any externally generated noise, or application ground noise. This 2.5 V threshold also makes it ideal to receive a drive signal from a local microcontroller.
Dimming mode
To achieve dimming, a signal with constant frequency and set duty cycle can be fed into the EN pin. There is a direct linear relationship between the average load current and duty cycle. If the ratio is 50%, 50% of the maximum set light output will be realized. Likewise if the ratio is 30%, 70% of the maximum set light output will be realized. A sufficiently high frequency of the dimming signal must be chosen to avoid flashing or "strobe light" effect. A signal on the order of a few kHz should be sufficient. For this evaluation board, a fully adjustable (0% to 100% duty cycle) PWM wave generator has been designed but not included in the layout. The following design is a recommended enable signal generator.
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VBUS RS2
R1 C1 C2 R3
R2
OUT1
1
IC2
VCC
8
OUT2
CVCC4 R6 R5 Out to ENN pin POT1 DEN2 CVCC3
LM393
IN1(-)
2 3
7
IN2(-)
IN1(+)
6
IN2(+)
GND
4
5
R4
COM
Fig. 22: Suggested PWM Driver (not included in IRPLLED1) If an external supply for VCC is used, the minimum amount of dimming achievable (light output approaches 0%) will be determined by the "on" time of the HO output, when in a fully functional regulating state. To maintain reliable dimming, it is recommended to keep the "off" time of the enable signal at least 10 times that of the HO "on" time. For example, if the application is running at 75 kHz with an input voltage of 100 V and an output voltage of 20 V, the HO "on" time will be 3.3 s (onefourth of the period - see calculations below) according to standard buck topology theory. This will set the minimum "off" time of the enable signal to 33 s.
Duty Cycle =
Vout 20 V 100 = *100 = 20% Vin 100 V
75 kHz = 3.3 s
HOon time = 20% * 1
If the chip is supplied from the output, a large enough capacitor on VCC is required to maintain sufficient current while in a disabled state. For this evaluation board, where the IC supply comes from the output, a 10 F capacitor is used to ensure continued proper operation while disabled, the output is capable of dimming down to roughly 10 V. A "strobe light" effect in the LEDs may be observed if VCC drops too much or if the dimming frequency is too low.
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Enable Duty Cycle Relationship to Light Output
100 90 80
Enable Pin Duty Cycle
70 60 50 40 30 20 10 0 0 10 20 30 40 50 60 70 80 90 100
Percentage of Light Output
Fig. 23: Light Output vs. Enable Pin Duty Cycle
Fig. 24: IRS2540 Dimming Signals Since the IRS254(0,1) does not include an onboard oscillator, a soft start feature is not possible. This is only a concern when operating in the dimming mode. Since PWM dimming is required of LEDs, the output is essentially turning on and off at a rate of the dimming frequency. In the absence of soft start, a large spike of current would be observed in the load each time the output is turned on. This current spike stresses the load possibly decreasing its overall lifetime. The IRPLLED1 includes a jumper setting to define whether or not the board is being used in the dimming mode. This two position jumper will allow the designer to either include or exclude the resistor Rout, which is in series with the output capacitor. The inclusion of this resistor will sufficiently damp the output stage, such that output current spikes are significantly reduced or eliminated. The presence of such current spikes may cause the inductor to hum or buzz, the emitted sound will be that of the dimming frequency. The inrush of current causes mechanical movement in the inductor which can be heard if the PWM signal is within the audible range of the human ear. The effects of adding in Rout can be seen in Figs. 25 - 28.
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Fig. 25: Load Current Spike Excluding Rout Iout = 350 mA, Vin = 100 V, Vout = 17 V
Fig. 26: Load Current Ripple Excluding Rout Iout = 350 mA, Vin = 100 V, Vout = 17 V Although the inclusion of the resistor will minimize or eliminate the load current spikes, the overall current regulation and operating frequency will be slightly compromised. The resistor will reduce the overall effectiveness of the output capacitor which means the switching frequency will marginally increase. Likewise the output ripple current will also increase, which ultimately leads to a larger current regulation tolerance. Although the overall current regulation capabilities may decrease with the inclusion of this resistor, the actual stability of the PWM dimming signal will still be the dominant factor of the overall output current regulation capabilities.
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Fig. 27: Load Current Spike Including Rout (5 ) Iout = 350 mA, Vin = 100 V, Vout = 17 V
Fig. 28: Load Current Ripple Including Rout (5 ) Iout = 350 mA, Vin = 100 V, Vout = 17 V
Open-circuit protection mode
By using the suggested voltage divider, capacitor, and zener diode, the designer can virtually clamp the output voltage at any desired value. If there is no load and the output clamp is not utilized, the positive output terminal will float at the high-side input voltage. The open load clamp is recommended if the load is disconnected and then reconnected without shutting down the driver. When the load is reconnected with power on, the load would see the entire bus voltage for a short period of time. The
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open-circuit clamp minimizes the amount of stress seen by the load under such circumstances by clamping the voltage much lower than VBUS.
Fig. 29: Open-Circuit Protection Scheme In open-circuit condition, switching will still occur between the HO and LO outputs, whether due to the output voltage clamp or to the watchdog timer. In this state, rather than regulating the current with the feedback pin, the output voltage will be loosely regulated via the enable pin. Transients and switching will be observed at the positive output terminal as seen in Fig. 30. The difference in signal shape, between the output voltage and the IFB, is due to the capacitor CEN used to form the voltage clamp. The repetition of the spikes can be reduced by simply increasing the cap size. If VBUS is significantly larger than the desired output voltage clamp, the output voltage will become a function of VBUS. This is because of the intrinsic delays of the chip (tLO,on, tLO,off, tHO,on, and tHO,off) along with the minimum HO on time. If the load is removed, the output will clamp at the desired voltage. Then if the bus voltage is increased, there could be a proportional change in the clamped voltage. This is not seen as an issue since the open-circuit clamp is strictly a safety feature to reduce the stress seen by the load, if disconnected and reconnected without a power down.
Fig. 30: Open-Circuit Fault Signals, with Clamp
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The two resistors ROV1 and ROV2 form a voltage divider for the output, which is then fed into the cathode of the zener diode DOV. The diode will only conduct, flooding the enable pin, when its nominal voltage is exceeded. The chip will enter a disabled state once the divider network produces a voltage at least 2.5 V greater than the zener rating. The capacitor CEN serves only to filter and slow the transients/switching at the positive output terminal. The clamped output voltage can be determined by the following analysis.
Vout =
(2.5 V + DZ )(R1 + R2 )
R2
DZ = Zener Diode Nominal Rated Voltage
DOV has been chosen to be a 7.5 V zener diode. ROV2 has also been set to 390 to help provide a low resistive charging path for CBOOT as previously discussed. It was also decided to clamp the output voltage at 30 V, this is sufficiently larger than the predefined maximum load voltage of 24 V as to not cause any erroneous shut-down, while it is also well within the specifications of the 100 V rated output stage. Having arbitrarily chosen these parameters, ROV1 was calculated as follows:
Vout =
(2.5 V + DZ )(ROV 1 + ROV 2 )
ROV 2
ROV 1 =
Vout ROV 2 30 V 390 - ROV 2 = - 390 = 780 (2.5 V + DZ ) (2.5 V + 7.5 V ) ROV 1 820
9. Other design considerations
Filtering
The RC filter on the IFB pin is only used to remove high frequency transients associated with the FET switching. The corner frequency of this filter was left high enough to prevent any further distortion of the feedback. The input filter is a low-pass filter. Its main objective is to prevent ringing of comparable frequency on Vbus. Exact values of capacitance and inductance are not of critical importance, so long as filtering is accomplished. In addition to the electrolytic that is used for filtering on the bus, there is also a small ceramic for high frequency signals. Ceramic capacitors typically have low ESR such that they are more ideal for high frequency filtering. VCC filtering was accomplished by typical means of using a small 100 nF ceramic, an additional electrolytic was used in case of dimming. The larger electrolytic was placed in event a long enable signal is given. With this larger capacitance, the VCC supply will remain for a prolonged period of time so the outputs will remain disabled, and the chip will not shut down.
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The ENN filter capacitor was arbitrarily chosen to be 100 nF, this helps slow the rate of switching during open load conditions. The IRS254(0,1) was specifically designed to handle low frequency ripples on VBUS. Its capability to handle such ripple makes it ideal for an offline rectified waveform. However if high voltage (on the order of 5 V to 10 V) high frequency oscillations (greater than or close to the operating frequency) are present on VBUS, it is recommended to implement an input filter. If these high frequency signals are present on VBUS the IRS254(0,1) will still continue to regulate the current through the load, but abnormal switching of LO and HO may be observed. This poses a problem in terms of switching losses. As previously discussed, one may need or want to control the operating frequency to control the systems efficiency, but if LO and HO randomly switch, it may negate all attempts to control the frequency. Of course the root of this problem can be significantly contributed through PCB layout, but it is also a function of the load current. If filters on IFB and VCC are not placed correctly these high frequency ripples will couple to the chip and appear within the control loop. Also if the load current is on the order of 1 A or 1.5 A, when HO turns on, the load immediately tries to pull the rated current. Since the circuit supply is not usually close by, the capacitance of the input wire is not enough to compensate for this large pull of current, this will result in oscillations or change in potential on the input line. Since the switching element of the circuit is one cause of these oscillations, it is easy to see how likely the presence of high frequency oscillations are. To alleviate the circuit of such possible problems, it is much easier to implement an input filter. The input filter will also greatly improve the circuits EMC performance.
EMC performance
The IRS254(0,1) demo board has not been EMC tested. Input and output filters can be used to reduce the conducted emissions to below the limits of the applicable EMC standard as needed. All inductors may require a powdered iron core rather than ferrite, it can handle a much larger current before saturating, needs are pending on the load current. If EMC is of critical importance, one may prefer to use one FET and one diode, in contrast to a half-bridge driver. The reverse recovery time for a diode is inherently shorter than that of a FET. This will help in reducing transients observed in the switching elements resulting in better EMC performance.
Layout considerations
It is very important when laying out the PCB for the IRS254(0,1) to consider the following points: 1. 2. 3. 4. 5. 6. 7. CVCC2 and CF must be as close to the IC as possible. The feedback path should be kept to a minimum without crossing any high frequency lines. COUT should be as close to the main inductor as possible. All traces that form the nodes VS and VB should be kept as short as possible. All signal and power grounds should be kept isolated from each other to prevent noise from entering the control environment. It's a general rule of thumb that all components associated with the IC should be connected to the IC ground with the shortest path possible. All traces carrying the load current need to be adjusted accordingly. Gate drive traces should also be kept to a minimum.
10. Design procedure summary
1. 2. 3. 4. Determine the systems requirements: input/output voltage and current needed Calculate current sense resistor Determine the operating frequency required Select L1 and COUT so that they maintain supply into the load during tHO,on. RD-0608 24
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5. 6. 7. 8.
Select switching components (FET/freewheeling diode) to minimize power losses Determine VCC and VBS supply components Add filtering on the input, IFB and ENN as needed Fine tune components to achieve desired system performance
11. Bill of materials
Careful selection of the components will significantly increase the reliability of the product, particularly for the capacitors. These need to be rated for at least 100 C and a proper voltage. As in most electronic power applications, capacitors and resistors are the components most likely to fail due to stress over time and high operating temperatures. All capacitors connected to the output in this evaluation board have only a rating of 100 V. These capacitors may also need to be changed if the load is significantly different from the tested load.
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Item 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42
Device Type C C C C C C D D D DZ DZ L L R R R R R R R R R R R IC M T T T H B J J SJ D R M TH W SC N
Description 10uF, 25V, Radial 100nF, 200V, 1812 100nF, 50V, 0805 33uF, 100V 1nF, 50V, 0805 47uF, 200V 200V, 1A Mini Melf 300V, 8A 14V, 0.5W, Mini Melf 7.5V, 0.5W, Mini Melf 470uH 470uH 10ohm, 1%, 0805 0.56ohm, 1%, 1206 0.47ohm, 1%, 1206 1.43ohm, 1%, 1206 100ohm, 1%, 0805 390ohm, 5%, 1/2W, 2010 820ohm, 5%, 1/2W, 2010 1k, 5%, 1W 47K, 5%, 1W 56K, 5%, 1W 5ohm, 5%, 1W IRS2540/1 200V, 16A, TO-220 PC Compact, red PC Compact, black PC Compact, yellow Heatsink PCB Jumper, 10 Pos. Jumper, 2 Pos. Shorting Jumper Not Fitted Not Fitted Not Fitted TO-220 Insulating Thermal PSP600-54 Shoulder Washer Screw, 4-40, 0.5", Zinc Nut, 4-40, Hex, Zinc 3049 H346-ND H216-ND
Part # UVZ1E100MDD VJ1812Y104KXCAT VJ0805Y104KXATW1BC UVZ2A330MPD VJ0805Y102KXACW1BC UVZ2D470MHD MUR120T3 LL4148 8ETH03 ZMM5244B-7 ZMM5236B-7 IL 050 321 31 01 RFB1010-471 MCR10EZHF10R0 ERJ-8RQFR56V ERJ-8RQFR47V 9C12063A1R43FGHFT MCR10EZHF1000 ERJ12ZYJ391 ERJ12ZYJ821 5073NW1K000J12AFX 5073NW47K00J12AFX 5073NW56K00J12AFX 5073NW5R100J12AFX IRS2540/1 2-641260-1 IRFB17N20D 5005 5006 5009 7-340-1PP-BA 929836-09-05-ND 929836-09-02-ND 929950-00-ND
Manufacurer Nichicon BC Components BC Components Nichicon BC Components Nichicon On Semi Diodes Inc IR Diodes Inc Diodes Inc VOGT Coilcraft Rohm Panasonic Panasonic Yageo Rohm Panasonic Panasonic Phoenix Passive Phoenix Passive Phoenix Passive Phoenix Passive IR Amp IR Keystone Keystone Keystone IERC 3M 3M 3M
# of devices 1 1 3 1 1 1 1 2 1 1 1 1 1 1 3 3 2 1 1 1 1 1 1 1 1 1 1 2 2 1 1 1 1 1 3
Reference CVCC1 CBUS2 CVCC2, CBOOT, CEN COUT CF CBUS1 DBOOT DEN1, DVCC D1 DCLAMP DOV L1 L2 RG1 RCS2, RCS4, RCS6 RCS1, RCS3, RCS5 RCS7, RCS8 RF ROV2 ROV1 RS2 RS3 RS1 Rout In Socket IC1 M1 T1, T4 T2, T5 T3
Socket 8 Pin DIP
Jset Jdim DIFB RIFB M2
Berquist Berquist Building Fasteners Building Fasteners
2 2 1 1
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Enable Signal Generator (not included)
Item 1 2 3 4 5 6 7 8 9 10 11 12 13 Device Type C C C D R R R R R R POT IC Socket Description 10uF, 25V, Radial 100nF, 50V, 0805 1nF, 50V, 0805 Mini Melf 1k, 1%, 0805 6.8k, 1%, 0805 10k, 1%, 0805 20k 75k 100k 10k, 10-turn Comparator 8 Pin DIP Part # ECEA1EKG100 VJ0805Y104KXATW1BC VJ0805Y102KXACW1BC LL4148 MRC10EZHF1001 MRC10EZHF6801 MRC10EZHF1002 MRC10EZHF2002 MRC10EZHF7502 MRC10EZHF1003 M64W103KB40 LM393D 2-641260-1 Manufacurer Panasonic BC Components BC Components Diodes Inc Rohm Rohm Rohm Rohm Rohm Rohm BC Components Texas Instruments Amp Tyco Electronics # of devices 1 1 2 1 1 1 1 1 2 2 1 1 1 CVCC3 CVCC4 C1, C2 DEN2 R6 R5 R4 R2 R1, R3 RS2 POT1 In Socket IC2 Reference
12. PCB Layout Top Overlay Top Metal
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Bottom Overlay
Bottom Metal
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245 Tel: (310) 252-7105 Data and specifications subject to change without notice. 9/8/2006
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